Articles from JEDEC Solid State Technology Association

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD406-5D: LPDDR5/5X Serial Presence Detect (SPD) Contents standard, an update of the Revision C standard that adds support for calculating recovery time when switching operating modes. JESD406-5D is available for free download from the JEDEC website.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of its highly anticipated JESD220H and JESD223G: Universal Flash Storage 5.0 and UFS Host Controller Interface (UFSHCI) 5.0. Designed for mobile applications, automotive and computing systems that demand high performance with low power consumption, UFS 5.0 will deliver faster data access and improved performance compared to its predecessor while maintaining compatibility with UFS 4.x hardware. For more information and download, visit the JEDEC website.

JEDEC® Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced it is nearing completion of JESD328: LPDDR5/5X Small Outline Compression Attached Memory Module (SOCAMM2) Common Standard, an upcoming standard for low-profile LPDRAM modules developed specifically for data center AI applications. When published, JESD328 is designed to provide a memory platform that delivers modular, low-power, high-bandwidth memory for AI CPU servers and accelerated computing platforms. JESD328 will define a compact, serviceable LPDDR5X-based module, Small Outline CAMM2 (SOCAMM2).

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced it is nearing completion of the next version of its highly anticipated Universal Flash Storage (UFS) standard: UFS 5.0. Designed for mobile applications and computing systems that demand high performance with low power consumption, UFS 5.0 plans to deliver faster data access and improved performance compared to its predecessor, while maintaining compatibility with UFS 4.x hardware.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-6, the latest Low Power Double Data Rate 6 (LPDDR6) standard. JESD209-6 is designed to significantly boost memory speed and efficiency for a variety of uses including mobile devices and AI. The new JESD209-6 LPDDR6 standard represents a significant advancement in memory technology, offering enhanced performance, power efficiency, and security. For more information and download, visit the JEDEC website.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of its highly anticipated High Bandwidth Memory (HBM) DRAM standard: HBM4. Designed as an evolutionary step beyond the previous HBM3 standard, JESD270-4 HBM4 will further enhance data processing rates while maintaining essential features such as higher bandwidth, power efficiency, and increased capacity per die and/or stack, because the higher bandwidth enables the higher data processing rate. To download JESD270-4, visit the JEDEC website.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced that its JC-15 Committee for Thermal Characterization Techniques for Semiconductor Packages welcomes interested companies to join JEDEC and participate in committee meetings and activities. Near-term plans for the committee include the evolution of standards that cover the provision of electronic thermal models in neutral file formats (e.g. JEP181, JEP30 T101), as well as the review and improvement of several key standards previously developed by the committee. For more information about JC-15 activities and JEDEC membership visit the JEDEC website.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, proudly announces upcoming standards for advanced memory modules designed to power the next generation of high-performance computing and AI applications. JEDEC today revealed key details about its upcoming standards for DDR5 Multiplexed Rank Dual Inline Memory Modules (MRDIMM) and a next-generation Compression-Attached Memory Module (CAMM) for LPDDR6. The new MRDIMM and CAMM for LPDDR6 are set to revolutionize the industry with unparalleled bandwidth and memory capacity.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced it is nearing completion of the next version of its highly anticipated High Bandwidth Memory (HBM) DRAM standard: HBM4. Designed as an evolutionary step beyond the currently published HBM3 standard, HBM4 aims to further enhance data processing rates while maintaining essential features such as higher bandwidth, lower power consumption, and increased capacity per die and/or stack. These advancements are vital for applications that require efficient handling of large datasets and complex calculations, including generative artificial intelligence (AI), high-performance computing, high-end graphics cards, and servers.

The JEDEC® Board of Directors presented its prestigious 2024 Distinguished Executive Leadership Award to Intel CEO, Pat Gelsinger, in a ceremony held at Intel’s offices in Santa Clara, CA earlier this month. This award stands as JEDEC’s highest honor and recognizes the most distinguished senior executives in the electronics industry who promote and support the advancement of JEDEC standards.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JEP198: Guideline for Reverse Bias Reliability Evaluation Procedures for Gallium Nitride Power Conversion Devices. Developed by JEDEC’s JC-70.1 Gallium Nitride Subcommittee, JEP198 is available for free download from the JEDEC website.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced that the JC-14.7 Subcommittee has expanded its scope to include standards for radio frequency (RF) technologies. The subcommittee is set to meet on Friday, April 19th, 2024 near Dallas, Texas, the day after the International Reliability Physics Symposium (IRPS). Industry stakeholders are encouraged to participate, and interested companies are invited to contact the JEDEC office to join the association and engage with JC-14.7.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of the JESD400-5A DDR5 Serial Presence Detect (SPD) Contents V1.1. This document defines the configuration contents of the non-volatile memory included on all JEDEC standard memory modules and is available for download from the JEDEC website.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD220F: Universal Flash Storage 4.0. In addition, an update to the complementary JESD223E UFSHCI 4.0 standard, and a new companion standard for UFS version 3.1 and above, JESD231 File Based Optimization, have also been published. Developed for mobile applications and computing systems requiring high performance with low power consumption, UFS 4.0 introduces significant bandwidth and data protection improvements over the earlier version of the standard. All three standards are available for download from the JEDEC website.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of the next version of its High Bandwidth Memory (HBM) DRAM standard: JESD238 HBM3, available for download from the JEDEC website. HBM3 is an innovative approach to raising the data processing rate used in applications where higher bandwidth, lower power consumption and capacity per area are essential to a solution’s market success, including graphics processing and high-performance computing and servers.

JEDEC Solid State Technology Association announced today that Bill Gervasi, Principal Systems Architect, Nantero, has been presented with the JEDEC Award of Excellence. Given by the JEDEC Board of Directors, the Award of Excellence is the most prestigious technical award bestowed by the Association and recognizes an individual’s sustained service to JEDEC and the standards community.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced publication of the JESD79-5A DDR5 SDRAM standard. This update to the JEDEC DDR5 SDRAM standard includes features designed to enhance reliability and performance in a wide range of applications involving client systems and high-performance servers. JESD79-5A is now available for download from the JEDEC website.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD233: XFM Embedded and Removable Memory Device (XFMD) standard. XFMD (XFM stands for Crossover Flash Memory) is a new universal data storage media providing an NVMe® over PCI Express® interface in a small, thin form factor. The device is designed to bring replaceable storage to devices typically soldered down in IoT devices and embedded applications. Developed by JEDEC’s JC-64.1 Subcommittee for Electrical Specifications and Command Protocols, JESD233 is available for download from the JEDEC website.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5B, Low Power Double Data Rate 5 (LPDDR5). JESD209-5B includes both an update to the LPDDR5 standard that is focused on improving performance, power and flexibility, and a new LPDDR5X standard, which is an optional extension to LPDDR5.

SAE International and JEDEC Solid State Technology Association announced today the signing of a Cooperation Agreement to formalize the partnership in defining technical, reliability and procurement standards enabling the use of microelectronics in critical applications across aviation, space and defense sectors.

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, announces the publication of JEP184: Guideline for Evaluating Bias Temperature Instability of Silicon Carbide Metal-Oxide-Semiconductor (MOS) Devices for Power Electronic Conversion. The publication developed by JEDEC’s JC-70.2 Silicon Carbide Subcommittee, JEP184 is available for free download from the JEDEC website.